Non-coherent and coherent connections in a multi-chip system
US11880327B1 · kind B1 · utility
1Cited by
2References
18Claims
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Key dates
| Filing date | Dec 7, 2021 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Mar 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A coherent connection and a non-coherent connection are provided between system-on-chips (SoCs). The coherent connection can be coupled to coherent interconnects on the SoCs, and the non-coherent connection can be coupled to non-coherent interconnects on the SoCs. An input/output (I/O) transaction from an I/O device on a first SoC that is targeted to a second SoC can be transmitted via the non-coherent connection, and a processor transaction from the first SoC that is targeted to the second SoC can be transmitted via the coherent connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.