Patent · US Active

Reducing compiler type check costs through thread speculation and hardware transactional memory

US11880669B2 · kind B2 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 8, 2019
Grant dateJan 23, 2024
Priority date
Expiry dateOct 8, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/4552
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems, apparatuses and methods may provide for technology that generates a first compiler output based on input code that includes dynamically typed variable information and generates a second compiler output based on the input code, wherein the second compiler output includes type check code to verify one or more type inferences associated with the first compiler output. The technology may also execute the first compiler output and the second compiler output in parallel via different threads.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.