Memory system and read method
US11881265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2022 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Apr 14, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/42
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes non-volatile memory cells for storing multiple bit data and a controller configured to control to apply read voltages to the non-volatile memory cells at different threshold levels to read data written to the non-volatile memory cells. The non-volatile memory cells comprise different sub-groups. The controller stores first information indicating a first initial value for each of the different threshold level of the read voltages, second information that indicates whether data can be successfully read from each sub-group when the respective different threshold levels of the read voltages are set to the first initial values, and third information that indicates a second initial value for each different threshold level of the read voltages for at least one sub-group for which data reading was unsuccessful when a read voltage was set to the first initial value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.