Method for manufacturing electronic chips
US11881413B2 · kind B2 · utility
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16References
20Claims
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Assignee
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Key dates
| Filing date | Jan 12, 2023 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Jan 12, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing electronic chips includes forming, on the side of a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed beforehand, metallizations coupling contacts of adjacent integrated circuits to one another. The method further includes forming, on the side of the first face of the substrate, first trenches extending through the first face of the substrate and laterally separating the adjacent integrated circuits. The first trenches extend through the metallizations to form at least a portion of metallizations at each of the adjacent circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.