Semiconductor device and termination structure
US11881514B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2021 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Nov 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/665
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a highly reliable semiconductor device in which an influence on device characteristics can be reduced while improving a high temperature and high humidity bias resistance of a termination structure (termination region) of a chip by a relatively simple method. The semiconductor device includes an active region disposed on a main surface of a semiconductor substrate, and a termination region disposed on the main surface so as to surround the active region. The termination region includes an interlayer insulating film formed on the main surface of the semiconductor substrate, and an organic protective film formed so as to cover the interlayer insulating film. An insulating film having a thickness of 100 nm or less and containing nitrogen is provided between the interlayer insulating film and the organic protective film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.