Power control circuit
US11881820B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2020 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | Jun 19, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power control circuit includes a negative feedback loop, and a radio frequency signal path including a first NMOS transistor having a gate configured as a radio frequency signal input end, a drain connected with a source of a second NMOS transistor, and a source connected with a ground terminal. A drain of the second NMOS transistor is configured as a radio frequency signal output end and connected with a first voltage source. The negative feedback loop includes a third NMOS transistor having a gate connected with an output end of a differential amplifier, a source connected with the ground terminal, and a drain connected with a source of a fourth NMOS transistor having a gate connected with a reverse input end of the differential amplifier and with a second voltage source, and a drain connected with a forward input end and a first bias current source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.