Semiconductor device and method for manufacturing the same
US11887889B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2021 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Jan 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device can include: forming an interlayer dielectric layer on an upper surface of a lower metal layer, the lower metal layer including first and second regions; forming a through hole extending from an upper surface of interlayer dielectric layer to the lower metal layer to expose the upper surface of the lower metal layer; forming a conductive layer covering a bottom part and sidewall parts of the through hole, and the upper surface of the interlayer dielectric layer; forming a first dielectric layer covering the first conductive layer on the first region of the lower metal layer; filling the through hole with a first metal; and forming an upper metal layer above the upper surface of the interlayer dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.