Unit verification method and device
US11889003B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2020 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Sep 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0861
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A unit verification method to be performed on a unit under test (UUT) comprises connecting a verification device to the UUT. The verification device applies a set of challenge signals to the UUT and then measures the responses of the UUT to the challenge signals. The responses of the UUT are based on the challenge signals and the physical properties of the UUT. A registration key is generated based on the measured responses and is stored. The registration key is unique to the UUT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.