Shift register unit and driving method thereof, gate driving circuit, and display substrate
US11893943B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 26, 2021 |
| Grant date | Feb 6, 2024 |
| Priority date | — |
| Expiry date | Jun 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit includes an input circuit, a first control circuit, a second control circuit, and an output circuit. The input circuit is configured to provide a signal of a first clock signal line or a first power line to a first control node. The first control circuit is configured to provide a signal of the first power line or a second power line to a first output terminal. The second control circuit is configured to provide a signal of the first power line or the second power line to a second output terminal. The output circuit is configured to output an effective level signal of the first power line or the second power line to a third output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.