Patent · US Active

Selective margin testing to determine whether to signal train a memory system

US11894084B2 · kind B2 · utility

0Cited by

1References

24Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Dujian Wu · Shanghai, CN
Shijian GE · Shanghai, CN
Daocheng BU · Shanghai, CN

Key dates

Filing date	Feb 8, 2019
Grant date	Feb 6, 2024
Priority date	—
Expiry date	Sep 24, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/46
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Method, systems and apparatuses may provide for technology that executes a margin test of a first memory storage based on a subset of first signals associated with the first memory storage. The technology determines, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints. The technology determines, based on the first margin data, whether to execute a signal training process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.