Readout circuit, signal quantizing method and device, and computer device
US11894857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2022 |
| Grant date | Feb 6, 2024 |
| Priority date | — |
| Expiry date | Mar 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/342
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed are a readout circuit, a signal quantizing method, a signal quantizing device, and a computer device. The readout circuit includes: a signal sampler, including a plurality of channels; a plurality of integrators, connected to the plurality of channels and having a one-to-one relationship with the plurality of channels; a signal processor, including a first operational amplifier, a sampling input of the first operational amplifier being connected to outputs of the plurality of integrators, respectively; and an analog-digital converter. An input of the analog-digital converter is connected to an output of the first operational amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.