Photonic integrated circuit and opto-electronic system comprising the same
US11899254B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 16, 2022 |
| Grant date | Feb 13, 2024 |
| Priority date | — |
| Expiry date | Apr 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12097
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A photonic integrated circuit including an InP-based substrate that is provided with a first InP-based optical waveguide and a neighboring second InP-based optical waveguide, a dielectric planarization layer that is arranged at least between the first optical waveguide and the second optical waveguide. At least between the first optical waveguide and the neighboring second optical waveguide, the dielectric planarization layer is provided with a recess that is arranged to reduce or prevent optical interaction between the first optical waveguide and the second optical waveguide via the dielectric planarization layer. At the location of the recess, the dielectric planarization layer has a first sidewall that is arranged sloped towards the first optical waveguide, and a second sidewall that is arranged sloped towards the second optical waveguide. An opto-electronic system including said PIC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.