Systems, methods, and devices for discarding inactive intermediate render targets
US11899588B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2021 |
| Grant date | Feb 13, 2024 |
| Priority date | — |
| Expiry date | Apr 17, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing unit (GPU) includes a table located in a memory of the GPU and a cache hierarchy. The table contains an address of inactive data in a cache hierarchy of the GPU in which the inactive data is associated with an intermediate render target. The cache hierarchy is responsive to an eviction event by discarding the inactive data from the cache hierarchy without performing a writeback to a system memory associated with the GPU based on the address of the inactive data being contained in the table. The cache hierarchy may obtain the address of the inactive data from the table, and the inactive data may be located in a last-level cache of the cache hierarchy. In one embodiment, the address of inactive data in a cache hierarchy of the GPU includes a range of addresses for the inactive data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.