Patent · US Active

Semiconductor circuit and semiconductor circuit system

US11900993B2 · kind B2 · utility

2Cited by
2References
39Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 13, 2020
Grant dateFeb 13, 2024
Priority date
Expiry dateNov 20, 2040

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor circuit according to the present disclosure includes: a first circuit configured to apply an inverted voltage of a voltage at a first node to a second node; a second circuit configured to apply an inverted voltage of a voltage at a second node to the first node; a first storage element including first, second, and third terminals; a first transistor including a drain coupled to the first node and a source coupled to the first terminal of the first storage element; a second transistor including a gate coupled to the first node or the second node and a drain coupled to the second terminal of the first storage element; and a third transistor including a gate coupled to the first node or the second node and a drain coupled to the second terminal of the first storage element. The first storage element is configured to set a resistance state between the first terminal and the second and third terminals in accordance with a direction of a current flowing between the second and third terminals.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.