Adaptive memory management and control circuitry
US11901000B2 · kind B2 · utility
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4References
19Claims
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Key dates
| Filing date | Aug 4, 2022 |
| Grant date | Feb 13, 2024 |
| Priority date | — |
| Expiry date | Aug 4, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An adaptive memory management and control circuitry (AMMC) to provide extended test, performance, and power optimizing capabilities for a resistive memory is disclosed herein. In one embodiment, a resistive memory comprises a resistive memory array and an Adaptive Memory Management and Control circuitry (AMMC) that is coupled to the resistive memory array. The AMMC is configured with extended test, reliability, performance and power optimizing capabilities for the resistive memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.