Systems and methods for intelligently implementing concurrent transfers of data within a machine perception and dense algorithm integrated circuit
US11907146B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2022 |
| Grant date | Feb 20, 2024 |
| Priority date | — |
| Expiry date | Nov 15, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
System and method for implementing accelerated memory transfers in an integrated circuit includes identifying memory access parameters for configuring memory access instructions for accessing a target corpus of data from within a defined region of an n-dimensional memory; converting the memory access parameters to direct memory access (DMA) controller-executable instructions, wherein the converting includes: (i) defining dimensions of a data access tile based on a first parameter of the memory access parameters; (ii) generating multi-directional data accessing instructions that, when executed, automatically moves the data access tile along multiple distinct axes within the defined region of the n-dimensional memory based at least on a second parameter of the memory access parameters; transferring a corpus of data from the n-dimensional memory to a target memory based on executing the DMA controller-executable instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.