Patent · US Active

Reconfigurable peripheral component interconnect express (PCIe) data path transport to remote computing assets

US11907151B2 · kind B2 · utility

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3References
20Claims
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Key dates

Filing dateNov 11, 2021
Grant dateFeb 20, 2024
Priority date
Expiry dateMay 11, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0026
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Described are methods for configuring computing system for and computing systems for PCIe communication between remote computing assets. The system uses a fabric interface device configured to receive multi-lane serial PCIe data from functional elements of a computing asset through a multi-lane PCIe bus, and to transparently extend the multi-lane PCIe bus by converting the multi-lane PCIe data into a retimed parallel version of the PCIe multi-lane data to be sent on bidirectional data communication paths. The fabric interface device is also configured so that the multi-lane PCIe bus can have a first number of lanes and the bidirectional data communication paths can have a different second number of lanes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.