Semiconductor device including well region
US11908807B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2022 |
| Grant date | Feb 20, 2024 |
| Priority date | — |
| Expiry date | Aug 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/66
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The semiconductor device includes: a substrate with first-conductivity-type impurities; first and second active regions provided on the substrate; a first deep element isolation layer surrounding the first active region; a second deep element isolation layer surrounding the second active region; a suction region surrounding the first and second deep element isolation layers, the suction region including the first-conductivity-type impurities; a well region provided in the substrate between the first and second active regions, the well region including second-conductivity-type impurities different from the first-conductivity-type impurities; a shallow element isolation layer provided between the suction region and the well region; and a guard structure connected to the suction region. The substrate includes a signal path portion that is provided between a top surface of the substrate and the well region, and surrounds an upper portion of the well region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.