Patent · US Active

Semiconductor structure and fabrication method thereof

US11908865B2 · kind B2 · utility

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20Claims
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Key dates

Filing dateJan 14, 2022
Grant dateFeb 20, 2024
Priority date
Expiry dateMay 23, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/0193

Abstract

A semiconductor structure and a fabrication method of the semiconductor structure are provided. The semiconductor structure includes a substrate. The substrate includes a first region, a second region, and an isolation region between the first region and the second region. The semiconductor structure also includes a first fin, a second fin and a third fin disposed over the first region, the second region, and the isolation region, respectively. Further, the semiconductor structure includes a gate structure. The gate structure includes a first work function layer over the first region and a first portion of the isolation region, and a second work function layer over the second region and a second portion of the isolation region. An interface where the first work function layer is in contact with the second work function layer is located over a top surface of the third fin.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.