Methods and systems for calibrating clock skew in a receiver

US11909853B2 · kind B2 · utility

Assignee

• SAMSUNG ELECTRONICS CO., LTD. · KR

Inventors

• Saikat Hazra · Survanagiri, IN
• Avneesh Singh Verma · Bengaluru, IN
• Raghavendra Molthati · Bengaluru, IN
• Sunil Rajan · Bengaluru, IN
• Tamal Das · Bengaluru, IN
• Ankit Garg · Noida, IN
• Praveen S. Bharadwaj · Survanagiri, IN
• Sanjeeb Kumar Ghosh · Bengaluru, IN

Key dates

• Filing date: Mar 16, 2022
• Grant date: Feb 20, 2024
• Expiry date: Mar 16, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L7/0337
• WIPO field: Digital communication
• WIPO sector: Electrical engineering

Abstract

Methods and systems for calibrating clock skew in a SerDes receiver. A method includes detecting a skew in a clock with respect to an edge of a reference clock, based on a value sampled by the clock and a value sampled by the reference clock at an edge of a data pattern, for a first Phase Interpolator (PI) code; determining a count of the skew from a de-serialized data word including outcome values obtained based on values sampled by the clock and values sampled by the reference clock at a predefined number of edges of the data pattern; obtaining a skew calibration code corresponding to the first PI code, from a binary variable obtained by accumulating an encoded variable to a previously generated binary variable; and calibrating the skew by performing a positive phase shift or a negative phase shift to the clock based on the skew calibration code.