Semiconductor memory device, electronic system including the same, and method of fabricating the same
US11910613B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2021 |
| Grant date | Feb 20, 2024 |
| Priority date | — |
| Expiry date | Apr 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a mold structure including a plurality of wordlines on a front side of a first substrate, and a string selection line and a stopper line on the plurality of wordlines. A channel structure extends in a vertical direction to penetrate the mold structure. A block separation area extends in a first direction to cut the mold structure. A protective structure is interposed between the block separation area and the stopper line and not between the block separation area and the string selection line and not between the block separation area and the plurality of wordlines. A string separation structure extends in the first direction to cut the string selection line and the stopper line. A bitline extends in a second direction on the mold structure. A bitline contact connects the channel structure and the bitline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.