Resiliency and performance for cluster memory
US11914469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2021 |
| Grant date | Feb 27, 2024 |
| Priority date | — |
| Expiry date | Sep 22, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are various embodiments for improving the resiliency and performance of clustered memory. A computing device can generate at least one parity page from at least a first local page and a second local page. The computing device can then submit a first write request for the first local page to a first one of a plurality of memory hosts. The computing device can also submit a second write request for the second local page to a second one of the plurality of memory hosts. Additionally, the computing device can submit a third write request for the parity page to a third one of the plurality of memory hosts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.