Nonvolatile logic memory for computing module reconfiguration
US11914545B2 · kind B2 · utility
1Cited by
25References
20Claims
0Family size
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Key dates
| Filing date | Dec 29, 2021 |
| Grant date | Feb 27, 2024 |
| Priority date | — |
| Expiry date | Jan 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/303
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Configuration states for a computing device and/or associated peripherals (“profiles”) are stored in one or more non-volatile logic (“NVL”) arrays. Using the non-volatile sub-system for the computing device, triggers for reconfiguration of the respective device or peripherals are provided to an NVL array controller, which controls provision of the new profile(s) for the respective device or peripherals over a dedicated bus to a configuration register that stores the active profiles for the device and associated peripherals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.