Systems, methods, and devices for accelerators with virtualization and tiered memory
US11914903B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2021 |
| Grant date | Feb 27, 2024 |
| Priority date | — |
| Expiry date | Oct 8, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device may include an interconnect interface, a memory system including one or more first type memory devices to receive first data, one or more second type memory devices to receive second data, and an accelerator configured to perform an operation using the first data and the second data. The memory system may further include a cache configured to cache the second data for the one or more second type memory devices. A device may include an interconnect interface, a memory system coupled to the interconnect interface to receive data, an accelerator coupled to the memory system, and virtualization logic configured to partition one or more resources of the accelerator into one or more virtual accelerators, wherein a first one of the one or more virtual accelerators may be configured to perform a first operation on a first portion of the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.