Patent · US Active

System and method for facilitating efficient utilization of an output buffer in a network interface controller (NIC)

US11916781B2 · kind B2 · utility

0Cited by
119References
20Claims
0Family size

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Key dates

Filing dateMar 23, 2020
Grant dateFeb 27, 2024
Priority date
Expiry dateMar 23, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L69/28
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.