Solid-state imaging apparatus
US11917312B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2020 |
| Grant date | Feb 27, 2024 |
| Priority date | — |
| Expiry date | Feb 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Solid-state imaging apparatuses are disclosed. In one example, an apparatus includes a first substrate and a second substrate. The first substrate includes a pixel array that is arrayed in columns and rows. The second substrate is stacked on the first substrate, and includes first and second analog circuits that overlap with the pixel array in a third direction intersecting the column and row directions. A pixel divider section divides pixels in the array into a first area and a second area. The first and second analog circuits respectively connect to pixels in the first and second areas, and are adjacent to each other with a circuit divider section interposed therebetween, the circuit divider section being located with an overlap with the pixel divider section in the third direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.