Reconfigurable computing chip
US11921667B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 8, 2022 |
| Grant date | Mar 5, 2024 |
| Priority date | — |
| Expiry date | Dec 8, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable computing chip, a method for configuring the reconfigurable computing chip, a method for convolution process, a device for convolution process, a computer readable storage medium and a computer program product are provided. The reconfigurable computing chip comprises a processing module including multiple processing cores sharing a first cache, wherein each of the plurality of processing cores includes multiple processing elements sharing a second cache, each of the plurality of processing elements monopolizes a third cache corresponding to said processing element, wherein the reconfigurable computing chip is dynamically configured to perform convolution process on an input feature map and a convolution kernel to obtain an output feature map, and each of the multiple processing elements is dynamically configured to perform a multiplication-plus-addition process on a part of the input feature map and a part of the convolution kernel to obtain a part of the output feature map.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.