LDMOS device and method for preparing same
US11923453B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2020 |
| Grant date | Mar 5, 2024 |
| Priority date | — |
| Expiry date | Sep 30, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/307
Abstract
The present invention relates to an LDMOS device and a method for preparing same. When a field plate hole is formed by etching an interlayer dielectric layer, the etching of the field plate hole is stopped on a blocking layer by means of providing the blocking layer between a semiconductor base and the interlayer dielectric layer. Since the blocking layer is provided with at least one layer of an etch stop layer, and steps are formed on the surface of the blocking layer, at least two levels of formed hole field plates are distributed in a step shape, and lower ends of the first level of hole field plates to the nth level of hole field plates are gradually further away from the drift area in the direction from a gate structure to a drain area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.