Global time counter based debug
US11927629B2 · kind B2 · utility
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2References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 27, 2021 |
| Grant date | Mar 12, 2024 |
| Priority date | — |
| Expiry date | Sep 27, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Techniques for debugging a circuit including a global counter configured to continuously increment, a comparator configured to transmit a clock stop signal based on a comparison of a comparator value and a counter value of the global counter, and clock stop circuitry configured to receive the clock stop signal and stop a clock signal to one or more portions of the electronic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.