Multi-layer capacitor
US11929211B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2021 |
| Grant date | Mar 12, 2024 |
| Priority date | — |
| Expiry date | Aug 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/385
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-layer capacitor including a capacitor element having at least two segments. Each segment includes multiple layer planes, including ceramic dielectric layers and electrode layers arranged therebetween, which are arranged in a layer sequence one above the other. The electrode layers include different electrodes, including at least first and second electrodes. The different electrodes overlap in active regions but not in passive regions. Multiple segments are arranged one above the other in a stack direction. The outermost dielectric layers of two segments form a connection region in which the segments are fixedly connected to each other parallel to the layer planes. The connection region contains a relief region. The relief region occupies at least the entire passive region of the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.