Semiconductor device and method for forming the same
US11929424B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 26, 2022 |
| Grant date | Mar 12, 2024 |
| Priority date | — |
| Expiry date | Jul 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/797
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming a semiconductor fin on a substrate; forming a dielectric layer over the semiconductor fin; forming a metal gate electrode in the dielectric layer and extending across the semiconductor fin; forming a source/drain regions on the semiconductor fin and on opposite sides of the metal gate electrode; performing a first non-zero bias plasma etching process to the metal gate electrode; after performing the first non-zero bias plasma etching process, performing a first zero bias plasma etching process to the metal gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.