Patent · US Active

Electronic apparatus

US11934232B2 · kind B2 · utility

0Cited by

12References

6Claims

0Family size

Assignee

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. · JP

Inventor

Ryusuke Teramoto · Osaka, JP

Key dates

Filing date	Nov 7, 2021
Grant date	Mar 19, 2024
Priority date	—
Expiry date	Jul 12, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG06F1/1656
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An electronic apparatus includes an upper case and a lower case. An end face of the upper case includes a first upper step surface and a second upper step surface located at high and inner positions with respect to the first upper step surface. An end face of the lower case includes a first lower step surface, a second lower step surface located at high and inner positions with respect to the first lower step surface, and a third lower step surface located at high and inner positions with respect to the second lower step surface. The first upper step surface is located at a low position with respect to the second lower step surface and faces the first lower step surface. The second upper step surface is located at a low position with respect to the third lower step surface and faces the second lower step surface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.