Software Vsync filtering
US11935502B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | Dec 30, 2020 |
| Grant date | Mar 19, 2024 |
| Priority date | — |
| Expiry date | Jan 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the present disclosure can receive a hardware Vsync signal from a display, generate a hardware timestamp signal based on the hardware Vsync signal, determine an error for a pulse in the hardware timestamp signal, determine whether the error for the pulse is over a threshold, synchronize a software Vsync signal based on the hardware timestamp signal, wherein the pulse of the hardware timestamp signal is ignored in synchronization based on whether the error is above the threshold, and control rendering and transmission of a frame to the display based on the synchronized software Vsync signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.