Semiconductor device and method of fabricating the same
US11935924B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2021 |
| Grant date | Mar 19, 2024 |
| Priority date | — |
| Expiry date | Jan 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
Abstract
Disclosed are semiconductor devices and/or method of fabricating the same. The semiconductor device comprises a substrate including first and second regions, a first active pattern on the first region and including a pair of first source/drain patterns and a first channel pattern including first semiconductor patterns, a second active pattern on the second region and including a pair of second source/drain patterns and a second channel pattern including second semiconductor patterns, a support pattern between two vertically adjacent first semiconductor patterns, and a first gate electrode and a second gate electrode on the first channel pattern and the second channel pattern. A channel length of the first channel pattern is greater than that of the second channel pattern. A ratio of a width of the support pattern to the channel length of the first channel pattern is in a range of 0.05 to 0.2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.