Array substrate, display panel and display device thereof
US11937465B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2021 |
| Grant date | Mar 19, 2024 |
| Priority date | — |
| Expiry date | Jun 21, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0247
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure relate to the field of display technology, and in particular, to an array substrate, a display panel and a display device thereof. The array substrate includes a substrate and a plurality of sub-pixels on the substrate. Each sub-pixel includes a pixel circuit. The pixel circuit includes a plurality of transistors. The plurality of transistors includes at least one oxide transistor. The array substrate further includes: an oxide semiconductor layer on the substrate, the oxide semiconductor layer comprising a channel region of the oxide transistor; a first planarization layer on the substrate and covering at least a portion of the oxide semiconductor layer; a barrier part on the side of the first planarization layer away from the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.