Techniques in hybrid regulators of high power supply rejection ratio and conversion efficiency

US11940824B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Xiaosen Liu · Portland, US
• Harish Krishnamurthy · Beaverton, US
• Krishnan Ravichandran · Saratoga, US
• Vivek K. De · Beaverton, US
• Scott Chiu · Folsom, US
• Claudia Patricia Barrera Gonzalez · Campbell, US
• Jing Han · Beijing, CN
• Rajasekhara Madhusudan Narayana Bhatla · Santa Clara, US

Key dates

• Filing date: Nov 20, 2020
• Grant date: Mar 26, 2024
• Expiry date: Mar 20, 2042

Classification

• Technology area (CPC G): Physics
• CPC primary: G05F1/67
• WIPO field: Control
• WIPO sector: Instruments

Abstract

Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.