Cache allocation method and device, storage medium, and electronic device
US11940915B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 2020 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Sep 12, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache allocation method is provided. A core accesses a L3 cache when detecting a miss response from each of a L1 and a L2 cache accessed by the core through sending instruction fetching instructions configured to request L1 and L2 caches to return an instruction and data. The L1 cache is a private cache of the core, the L2 cache is a common cache corresponding to a core set including the core, the L3 cache is a common cache shared by core sets, and the miss response from the L2 cache carries network slice information. A planning unit in the L3 cache allocates the core sets to network slices, configures caches for the network slices according to the network slice information, and sends a hit response to the core. The hit response is configured to return data in a cache of a network slice corresponding to the core set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.