Methods, systems, and apparatuses for a multiprocessor boot flow for a faster boot process
US11941409B2 · kind B2 · utility
1Cited by
1References
24Claims
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Key dates
| Filing date | Jun 27, 2020 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Feb 10, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and apparatuses relating to circuitry to implement a multiprocessor boot flow for a faster boot process are described. In one embodiment, a system includes a hardware processor comprising a processor core, a cache coupled to the hardware processor, storage for hardware initialization code, and a controller circuit to initialize a portion of the cache as memory for usage by the hardware initialization code before beginning execution of the hardware initialization code after a power on of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.