Systems and methods for synchronization mechanisms for magnetic cards and devices
US11941469B1 · kind B1 · utility
0Cited by
281References
20Claims
0Family size
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Key dates
| Filing date | Apr 7, 2017 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Apr 7, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K7/084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor of a card may detect variations (e.g., position, velocity, acceleration and direction) of a read head in relation to the card. Based on certain parameters (e.g., card length, initially detected read head position, and read head velocity) a processor of a card may adjust synchronization bit patterns that may synchronize communications between the card and a read head of a magnetic stripe reader. A processor of a card may generate a number of leading synchronization bits that is different than a number of trailing synchronization bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.