Display panel with transistors and sub-pixels, and display device with display panel
US11942053B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 20, 2020 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Feb 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Disclosed are a display panel and a driving method therefor, and a display device. Two adjacent rows of sub-pixels are taken as a row group, and the row group is provided with a first sub row group and a second sub row group that are arranged in a column direction; a gate electrode of a first transistor in the first sub row group is electrically connected to a first gate line; a gate electrode of a second transistor in the second sub row group is electrically connected to a second gate line; two adjacent sub-pixels in the column direction share one third transistor, and a gate electrode of the third transistor in the row group is electrically connected to a third gate line; and the first transistor and the second transistor in one column of sub-pixels are electrically connected to a data line by means of the shared third transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.