Patent · US Active

Semiconductor packages with embedded interconnects

US11942406B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Kyu Oh Lee · Chandler, US
Dilan Seneviratne · Chandler, US
Ravindranadh Eluri · Tempe, US

Key dates

Filing date	Jun 7, 2022
Grant date	Mar 26, 2024
Priority date	—
Expiry date	Jun 7, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/014
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor package may include a semiconductor package first side, an embedded bridge interconnect, a first via, and a second via. The bridge interconnect may include a bridge interconnect first side with a conductive pad and a bridge interconnect second side. The distance between the bridge interconnect first side and the semiconductor package first side may be less than a distance between the bridge interconnect second side and the semiconductor package first side. The first and second vias may each include a first end that is narrower than s second end. The semiconductor package first side may be closer to the first end of the first via than the second end of the first via, and closer to the second end of the second via than the first end of the second via. The first side of the semiconductor package may be configured to electrically couple to a die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.