Semiconductor device with multichannel heterostructure and manufacturing method thereof
US11942525B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2020 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Feb 9, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
The present disclosure relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes a semiconductor heterostructure layer and a conductive structure. The semiconductor heterostructure layer includes alternating first semiconductor material layers and second semiconductor material layers. 2DHGs may be generated between each first semiconductor material layer and adjacent second semiconductor material layer. The conductive structure includes a plurality of conductive fingers extending from a surface of the semiconductor heterostructure layer into the semiconductor heterostructure layer. The plurality of conductive fingers are arranged in a direction substantially parallel to the surface. The lengths of the plurality of conductive fingers progressively increase in that direction, so that an end portion of each conductive finger is respectively positioned in a different second semiconductor material layer and is not in contact with the 2DHG.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.