Gateway device with clock speed that reduces electro-magnetic noise
US11943843B2 · kind B2 · utility
0Cited by
1References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2021 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Aug 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B15/02
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A network device includes: a radio configured to operate in a 2.4 GHz Wi-Fi band; a 32 bit double data rate (DDR) memory having instructions stored therein; a system clock configured to operate at 533 MHz; and a processor. The processor is configured to execute the instructions stored on the memory to cause the network device to: operate the 32 bit DDR memory at 1067 MHz; instruct the radio to transmit data to be transmitted in the 2.4 GHz Wi-Fi band; and instruct the radio to receive data to be received in the 2.4 GHz Wi-Fi band.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.