Hardware latency monitoring for memory device input/output requests
US11947804B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2022 |
| Grant date | Apr 2, 2024 |
| Priority date | — |
| Expiry date | Apr 6, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a hardware circuitry having a device coupled with one or more external memory devices. The device is to detect an input/output (I/O) request associated with an external memory device of the one or more external memory devices. The device is to record a first timestamp in response to detecting the IO request transmitted to the external memory device. The device is further to detect an indication from the external memory device of a completion of the IO request associated with the external memory device and record a second timestamp in response to detecting the indication. The device is also to determine a latency associated with the IO request based on the first timestamp and the second timestamp.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.