Image sensor having vertical, transfer, reset, source follower, and select transistors vertically aligned over the photodiode
US11948964B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2020 |
| Grant date | Apr 2, 2024 |
| Priority date | — |
| Expiry date | Mar 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/809
Abstract
An image sensor is disclosed. The image sensor includes a semiconductor substrate, a plurality of pillars protruding from the semiconductor substrate, and spaced from each other, a spacer layer on the semiconductor substrate and a sidewall of each of the plurality of pillars, a plurality of gate structures on the spacer layer, and a plurality of unit pixels arranged in a matrix form. The first unit pixel includes a first photodiode (PD) formed in the semiconductor substrate, a first pillar, a second pillar and a third pillar of the plurality of pillars, and a first gate structure and a second gate structure of the plurality of gate structures. Each of the first pillar and the second pillar includes a first channel region and a first drain region on the first channel region. The third pillar is not surround by any gate structure of the plurality of gate structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.