Shift register, scanning signal line driving circuit including same, and display device including same
US11955097B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2022 |
| Grant date | Apr 9, 2024 |
| Priority date | — |
| Expiry date | Dec 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes stages each constituted by a unit circuit provided with a thin-film transistor (separation transistor) that separates a control node into an output-side first control node and an input-side second control node and a capacitor whose first end is connected to the second control node. The thin-film transistor (separation transistor) has a control terminal that is supplied with a high-level DC power supply voltage. Typically, the channel width of a thin-film transistor (first output control transistor) that controls output from a unit circuit is ten or more times greater than the channel width of the thin-film transistor (separation transistor).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.