Patent · US Active

VCSEL binning for optical interconnects

US11955778B2 · kind B2 · utility

0Cited by
13References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 25, 2021
Grant dateApr 9, 2024
Priority date
Expiry dateOct 30, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01S5/183
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

A method and system for large scale Vertical-Cavity Surface-Emitting Laser (VCSEL) binning from wafers to be compatible with a Clock-Data Recovery Unit (CDRU) and/or a VCSEL driver are provided. An illustrative method of binning is provided that includes: for at least a portion of VCSELs on a wafer, measuring a set of representative parameters of the VCSELs, of predetermined DC or small-signal values, and sorting the measured VCSELs into clusters according to the measured set of representative parameters of the VCSELs; further sorting the clusters into sub-groups that comply with specifications of the VCSEL driver; and providing a feedback signal to the CDRU for equalizing control signals provided to the VCSEL driver.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.