Electronic device supporting addition of secondary node, and method therefor
US11956843B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2019 |
| Grant date | Apr 9, 2024 |
| Priority date | — |
| Expiry date | Dec 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W88/06
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Disclosed according to various embodiments is an electronic device comprising: a first communication circuit configured to provide first wireless communication within a first frequency range; a second communication circuit configured to provide second wireless communication within a second frequency range; a processor operably connected to the first communication circuit and the second communication circuit; and a memory operably connected to the processor, wherein the memory has instructions stored therein which cause, when executed, the processor to: establish a channel for communication with a first base station, by using the first communication circuit; receive, from the first base station, a first message containing information about at least one frequency at which to assess a communication status by using the second communication circuit; assess statuses for communication with one or more second base stations, by using the second communication circuit on the basis of the first message; transmit a second message concerning the one or more second base stations to the first base station on the basis of results obtained by the assessment; receive, from the first base station, a t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.