Vertical variable resistance memory devices and methods of operation in the same
US11957071B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2022 |
| Grant date | Apr 9, 2024 |
| Priority date | — |
| Expiry date | Oct 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A vertical variable resistance memory device includes gate electrodes and a pillar structure. The gate electrodes are spaced apart from one another on a substrate in a vertical direction substantially perpendicular to an upper surface of the substrate. The pillar structure extends in the vertical direction through the gate electrodes on the substrate. The pillar structure includes a vertical gate electrode extending in the vertical direction, a variable resistance pattern disposed on a sidewall of the vertical gate electrode, and a channel disposed on an outer sidewall of the variable resistance pattern. The channel and the vertical gate electrode contact each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.