Patent · US Active

Reducing computations for data including padding

US11960566B1 · kind B1 · utility

0Cited by
1References
20Claims
0Family size

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Inventors

Key dates

Filing dateApr 13, 2021
Grant dateApr 16, 2024
Priority date
Expiry dateSep 18, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06N3/08
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods are provided to eliminate multiplication operations with zero padding data for convolution computations. A multiplication matrix is generated from an input feature map matrix with padding by adjusting coordinates and dimensions of the input feature map matrix to exclude padding data. The multiplication matrix is used to perform matrix multiplications with respective weight values which results in fewer computations as compared to matrix multiplications which include the zero padding data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.